Turbo码编译码专业系统设计及其FPGA实现.doc

硕士学位论文题目Turbo码编/译码系统设计及其FPGA实现（英文）TheDesignofTurboCoding/DecodingSystemanditsImplementwithFPGA摘要Turbo码出现是纠错编码史上一个重大突破，它含有在低信噪比下靠近Shannon理论极限优异译码性能，在很多通信系统中全部有很大应用前景。本文关键研究是Turbo码编码和译码算法及其FPGA硬件实现。首先，介绍了课题研究背景和Turbo译码中国外研究现实状况；其次在介绍Turbo编译码原理基础上对现在常见各类译码算法进行介绍和性能分析；接着关键研究Turbo码译码器设计，最终用硬件实现了其电路。本文分别对Turbo码MAP算法，Max-Log-MAP算法，Log-MAP算法、SOVA算法等进行了推导。在深入分析译码算法基础上，决定采取Log-MAP算法作为本系统译码算法。在对该系统硬件实现过程中，为了节省硬件资源和降低延时，对Log-MAP算法进行了部分改善。在系统设计中，依据FPGA技术优点，采取“自上而下”和“自下而上”结合设计方法，经过合适模块分割，将Turbo码译码器分为三大模块:Log-MAP译码单元模块、交织/解交织器模块和控制信号产生模块。本文针对编码器中延时模块采取一个类似于交织器方法来实现延时功效，使其精度更高，编码效果愈加好。并对译码器进行了研究，给出了一个查找表法来实现复杂E函数，此方法显著简化了系统运算复杂度。在硬件实现Log-MAP算法过程中，经过巧妙地改变前向矢量计算次序，降低了系统占用硬件资源。最终利用QuartusII软件对编译码系统做了计算机仿真，结果表明本系统实现Turbo码译码器误码性能很好，含有一定实用价值。关键词:Turbo码，Log-MAP算法，软判决，FPGAABSTRACTTheemergenceofTurbo-Codeisconsideredasthemostexcitingandpotentiallyimportantdevelopmentinthehistoryoferror-correctingcodes.IthasasuperiordecodingperformanceapproachingtheShannonlimitandhasbeenwidelyapplicatedinmanycommunicationsystems.ThegoalofthispaperistostudyTurboencoding/decodingalgorithmanditshardwareimplementationwithFPGA.Firstly,itintroducesbackgroundofthesubjectandtheresearchsituationaboutTurbodecoding;Secondly,itintroducesthecurrentvariousdecodingalgorithmandanalyzestheirperformancerespectivelybasedonanalyzingtheencoding/decodingprincipleofTurbo-Code;thenstudiesthedesignoftheTurbodecoderwhichhardwarecircleissuccessfullyimplementedfinally.IncludingtheMAPalgorithm,Max-Log-MAPalgorithm,Log-MAPalgorithmandSOVAalgorithminTurbo-Codealgorithmisdeducedrespectivelyinthepaper.Onthebaseofin-depthanalysisofthedecodingalgorithm,theLog-MAPalgorithmasthedecodingalgorithminthesystemisselected.Intherealizationprocessofhardwareinthissystem,Log-MAPalgorithmhasbeenimprovedinordertosavethehardwareresourcesandreducedelay.InthedesignofTurbo-Codesystem,thecombiningdesignmethodofboth"fromtoptobottom"and"frombottomtotop"isimplementedaccordingtoadvantageoftheFPGA,andthedecoderisdividedintothreeblocks:Log-MAPdecoder,interleaver/dein